Data processors typically utilize instruction sets for specifying various functions to be performed by a data execution unit. One form of instruction commonly comprises two fields in which a first field specifies at least one operand register location and a second field specifies an execution unit operation, such as increment or decrement, to be performed on the selected operands. An example of an execution unit of a data process which utilizes a conventional instruction set is taught in U.S. Pat. No. 4,296,469 entitled "Execution Unit for Data Processor Using Segmented Bus Structure" by Gunter et al. However, previous known execution units operate in only one arithmetic format, such as conventional linear arithmetic. Conventional linear arithmetic is typically implemented in data processors using two's complement binary arithmetic. In order for other arithmetic formats to be used, such as modulo arithmetic, additional fields in the instruction set are required to specify the arithmetic format of each operand. The data execution unit must also be informed how to process the particular arithmetic format of each data operand. Therefore, additional fields in the instruction must be decoded to control the arithmetic format of the data execution unit.
Typically, data processors use multiple arithmetic formats in data execution units. A typical data processor provides instructions for processing data in a linear arithmetic format or in a binary coded decimal (BCD) arithmetic format. However, additional instructions are required to implement this capability. Therefore, previous processors which have implemented various arithmetic formats have the disadvantages of either using additional instruction bits (wider instructions) or using an increased number of instructions. Unfortunately, additional instruction bits are not always available and expansion of the instruction set is typically limited. Limited instruction expansion results from near capacity utilization of the existing instruction set.
Others have also provided for varying arithmetic formats by using additional bits in each data operand to specify the type of arithmetic format. However, the size of each data operand is increased, and the number of bits available as data is decreased. Therefore, the arithmetic format information is data dependent, and the data operand is limited to being processed in only one arithmetic format.